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microprocessor system bus data transfer bus arbitration bus interrupt bus high-performance backplane bus civil transportation airport terminal building introductionthis standard gas detection alarms emu ventilation devices
GB/T 13724-2008 in English

GB/T 13724-2008 in English

VALID

821 BUS - Microprocessor system bus for 1 to 4 byte data

  • Issued on:2008-08-06
  • Implemented on:2009-01-01
  • File Format:PDF
  • Delivery:Via email within 1~3 business days
Price(USD): $2,580.00
$2,503.00
Standard No: GB/T 13724-2008
Document status: VALID
Title in English: 821 BUS - Microprocessor system bus for 1 to 4 byte data
Title in Chinese: 821总线 1至4字节数据微处理机系统总线
Language: English
File Format: Electronic (PDF)
Delivery: Via email within 1~3 business days
Issued on: 2008-08-06
Implemented on: 2009-01-01
Superseding: GB/T 13724-1992 821BUS-Microprocessor system bus for 1 to 4 byte data
ICS Classification: 35.160-Microprocessor systems
Chinese Classification: L65-System equipment interface
Professional Classification: GB-National Standard
Related Keywords: microprocessor system bus
data transfer bus
arbitration bus
interrupt bus
high-performance backplane bus
Related Topics: Chromatography Data Processing System
total liquid handling
Chromatography machine data processing
Total phosphorus treatment
bus
microprocessor
byte
Total Organic Online
GBT13724
GB/T 13724-1992
GB/T 13724-2008
bus line

《GB/T 13724-2008821总线 1至4字节数据微处理机系统总线》由TC28(全国信息技术标准化技术委员会)归口,TC28SC25(全国信息技术标准化技术委员会信息技术设备互连分会)执行,主管部门为国家标准化管理委员会。
本标准规定一种高性能的底板总线,用于采用单一或多重微处理器的微型计算机系统。


Scope

This standard specifies a high-performance backplane bus for use in microcomputer systems employing single or multiple microprocessors. This backplane is based on the VME bus specification, published in August 1982 by a group of VME manufacturers. The bus includes four sub-buses: data transfer bus, priority interrupt bus, arbitration bus and utility bus. The data transfer bus supports 8-bit, 16-bit, and 32-bit transfers over the non-multiplexed data and address information highway. The transfer protocol used is asynchronous and full handshaking. The priority interrupt bus provides real-time interrupt service to the system. The dominance of the bus is assigned by the arbitration bus, which allows two algorithms of round-robin and prioritized arbitration. The utility bus provides power-up and power-down synchronization for the system. Various boards, chassis, racks and enclosures are based on lEC 297.

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