GB/T 39588-2020 in English
VALIDRequirements and test methods for electrostatic shielding packaging bags
- Issued on:2020-12-14
- Implemented on:2021-07-01
- File Format:PDF
- Delivery:Via email within 1~3 business days
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《GB/T 39588-2020静电屏蔽包装袋要求及检测方法》由424-cnis（中国标准化研究院）归口，主管部门为国家市场监督管理总局。
Introduction
Analysis of the core content of the standard
| Technical indicators | Required values | Test methods |
|---|---|---|
| Surface resistance | Inner surface 1.0×10⁴-1.0×10¹¹Ω Outer surface <1.0×10¹²Ω | Dual electrode method (23±2℃/12±3%RH) |
| Sealing strength | ≥40N/25mm | Tensile testing machine (500mm/min) |
| Puncture resistance | ≥12N | Conical probe puncture test |
Detailed explanation of key technical requirements
1. Electrostatic shielding performance
The standard clearly defines that electrostatic shielding packaging bags must have the following characteristics: (1) a metallized layer on the outer surface to form a Faraday cage effect; (2) an electrostatic dissipative layer on the inner surface (10⁴-10¹¹Ω). The typical structure is a three-layer composite of PET/AL/PE, in which the thickness of the aluminum layer directly affects the shielding effectiveness.
2. Key test items
Internal induced electric energy test
Use 100pF/1.5kΩ simulator, calculate by formula E=R×Σ(I²×Δt), and require ≤50nJ. When testing, please note: (1) Ambient humidity must be <60%; (2) The interval between two tests must be ≥30s; (3) The capacitance probe must be calibrated regularly.
Implementation recommendations
- Incoming inspection: Focus on checking the appearance, size and surface resistance, and the sampling ratio is recommended to be ≥5%
- Storage management: Maintain an ambient temperature of 23±5℃, relative humidity <60%, and avoid stacking more than 5 layers
- Usage specifications: Use an ion fan to eliminate static charge in the bag before sealing, and the sealing width should be ≥10mm
Technology evolution analysis
Compared with the ANSI/ESD S541 standard, GB/T 39588-2020 has added the internal induced electrical energy indicator, which is more suitable for the protection requirements of highly sensitive electronic components (such as aerospace-grade IC chips). The 2021 version of IEC 61340-4-8 has referred to the test method of this standard.
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