GB/T 42896-2023 in English
VALIDMicro-electromechanical systems(MEMS) technology―Impact test method for nanostructures of silicon based MEMS
- Issued on:2023-08-06
- Implemented on:2023-12-01
- File Format:PDF
- Delivery:Via email within 1~3 business days
$214.00
| Standard No: | GB/T 42896-2023 |
| Document status: | VALID |
| Title in English: | Micro-electromechanical systems(MEMS) technology―Impact test method for nanostructures of silicon based MEMS |
| Title in Chinese: | 微机电系统(MEMS)技术 硅基MEMS纳尺度结构冲击试验方法 |
| Language: | English |
| File Format: | Electronic (PDF) |
| Delivery: | Via email within 1~3 business days |
| Issued on: | 2023-08-06 |
| Implemented on: | 2023-12-01 |
| ICS Classification: | 31.200-Integrated circuits. Microelectronics |
| Chinese Classification: | L59-Micromodule |
| Professional Classification: | GB-National Standard |
| Related Keywords: | ― impact test method
in-situ on-chip impact tester > test environment requirements mems technology test method in-situ on-chip impact tester |
| Related Topics: | Impact test method standard
Impact test method Silicon base scale Impact test method Impact Tester System Impact Tester System mems chip mems test system |
《GB/T 42896-2023微机电系统(MEMS)技术 硅基MEMS纳尺度结构冲击试验方法》由TC336(全国微机电技术标准化技术委员会)归口,主管部门为国家标准委。
Introduction
GB/T 42896—2023 Standard Overview
This standard mainly specifies the test method for the impact resistance of silicon-based MEMS nanoscale structures under impact loads in microelectromechanical systems (MEMS) technology. It is applicable to nanoscale structures manufactured using microelectronics technology, with particular attention paid to the assessment of their impact resistance under a single impact load.
Core content interpretation
1. Background and significance of standard formulation
With the rapid development of MEMS technology, nanoscale structures are increasingly used in microelectronics, optoelectronics, biomedicine and other fields. However, these microstructures face complex mechanical environments in actual use, especially under the action of impact loads, which may cause failure. The formulation of this standard fills the gap in the assessment method of the impact resistance of silicon-based MEMS nanoscale structures, and provides an important basis for the quality control and reliability assessment of MEMS devices.
2. Explanation of Key Terms
- In situ on-chip impact tester: A test structure and a test device integrated on the same wafer, used to evaluate the impact resistance of micro-nano structures.
- Testing structure: A micro-nano structure specially designed to measure the properties of materials or microstructures, such as a cantilever beam or a fixed beam.
3. Comparison table of standard frameworks
| Chapter | Content Overview | Specific Requirements |
|---|---|---|
| 4.1 | Design Requirements for In-situ On-chip Impact Tester | - Structural Description: Schematic Diagram and Three Views - Structural Stability within the Impact Energy Range - Repeatability and Compatibility of Processing Technology |
| 4.2 | Preparation Requirements for In-situ On-chip Impact Tester | - Preparation Process Compatible with MEMS Chip Manufacturing - Material Compatibility |
| 4.3 | Preparation Requirements for In-situ On-chip Impact Tester | - Preparation Process Compatible with MEMS Chip Manufacturing - Material Compatibility |
| 4.4 | Preparation Requirements for In-situ On-chip Impact Tester>Test environment requirements | - The test should be carried out in the actual manufacturing environment of MEMS device chips |
4. Implementation suggestions
When implementing this standard, enterprises should pay attention to the following points:
- Equipment selection and calibration: Select an in-situ on-chip impact tester that meets the requirements and ensure its accuracy and reliability.
- Test structure design optimization: Adjust the test structure parameters according to the specific application scenario, such as the design of the cantilever beam or fixed beam to match the needs of different MEMS devices.
- Data recording and analysis: Standardize the recording and analysis process of test data to ensure the accuracy and traceability of the results.

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