GB/T 42973-2023 in English
VALIDSemiconductor integrated circuits—Digital-analog（DA）converter
- Issued on:2023-09-07
- Implemented on:2024-01-01
- File Format:PDF
- Delivery:Via email within 5 business days
$582.00
《GB/T 42973-2023半导体集成电路 数字模拟（DA）转换器》由TC599（全国集成电路标准化技术委员会）归口，主管部门为工业和信息化部（电子）。
Introduction
Interpretation of the core content of the standard
| Technical dimensions | Nyquist rate DAC | Oversampling DAC | Test methods |
|---|---|---|---|
| Conversion principle | Resistance/capacitance/current voltage division | Noise shaping + digital domain processing | Chapters 6.2-6.3 |
| Typical structure | R-2R network/charge redistribution/current steering | Σ-Δ modulator | Chapters 4.2-4.3 |
| Key indicators | DNL/INL/Settling Time | SNR/SFDR/THD | Chapter 5.2 |
Technical Parameter System Analysis
Static Characteristics Indicators
- Accuracy Parameters: Offset Error (±0.1LSB), Gain Error (±0.5%)
- Linearity: DNL(±1LSB), INL(±2LSB)
- Temperature Characteristics: Error Temperature Coefficient (5ppm/℃)
Dynamic Characteristics Indicators
- Frequency Domain Characteristics: SNR(＞80dB), SFDR(＞90dBc)
- Time domain characteristics: setup time (10ns), glitch energy (5pV·s)
- Power supply characteristics: PSRRDC (60dB), PSRRAC (40dB)
Test Method Essentials
Static Test Scheme
The code scanning method is used to measure the output of all digital points, and the conversion curve is determined by the least squares fitting method to calculate:
- Differential nonlinearity (DNL) = |ΔVactual - VLSB|/VLSB
- Integral nonlinearity (INL) = |Vmeasured - Videal|/VLSB
Dynamic Test Scheme
Use spectrum analysis to evaluate frequency domain performance:
- Input single-tone/dual-tone digital signal
- Acquire output signal for FFT analysis
- Calculate signal-to-noise ratio (SNR) = 10lg(Psignal/Pnoise)
Recommendations for standard implementation
Design phase
- Select DAC architecture based on application scenario: current steering structure is preferred for high-speed scenario, and Σ-Δ architecture is selected for high-precision scenario
- Temperature compensation design must meet the 6 temperature grade requirements in Section 5.1
Test phase
- Establish a standardized test platform: it must include high-precision source meter, spectrum analyzer, and high-speed oscilloscope
- Strictly follow the sampling plan in Section 7.4, and Class III devices must be 100% screened
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